Paket: yosys-abc (0.52-2)
yosys-abc için bağlantılar
Debian Kaynakları:
- Hata Raporları
- Developer Information
- Debian Değişim Günlüğü
- Telif Hakkı Dosyası
- Debian Yama Takipçisi
yosys Kaynak Paketini İndir:
- [yosys_0.52-2.dsc]
- [yosys_0.52.orig-abc.tar.gz]
- [yosys_0.52.orig.tar.gz]
- [yosys_0.52-2.debian.tar.xz]
Geliştiriciler:
Dış Kaynaklar:
- Ana Sayfa [github.com]
Benzer paketler:
Sequential Logic Synthesis and Verification Algorithms
ABC is a system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. It combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification.
This is a fork of berkeley-abc maintained by the YosysHQ team for use in the yosys RTL synthesis framework.
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- dep: libgcc-s1 (>= 3.0) [amd64, i386, riscv64]
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- dep: libgcc-s1 (>= 3.5) [armel, armhf]
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yosys-abc indir
Mimari | Paket Boyutu | Kurulu Boyut | Dosyalar |
---|---|---|---|
amd64 | 4.828,6 kB | 12.925,0 kB | [dosya listesi] |
arm64 | 4.271,9 kB | 12.054,0 kB | [dosya listesi] |
armel | 4.084,7 kB | 11.854,0 kB | [dosya listesi] |
armhf | 4.254,2 kB | 8.910,0 kB | [dosya listesi] |
i386 | 4.902,4 kB | 13.881,0 kB | [dosya listesi] |
ppc64el | 4.906,7 kB | 15.382,0 kB | [dosya listesi] |
riscv64 | 4.798,1 kB | 10.774,0 kB | [dosya listesi] |