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[ 原始碼: arachne-pnr  ]

套件:arachne-pnr(0.1+20190728gitc40fb22-3)

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Place and route tool for iCE40 family FPGAs

Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device.

Together, Yosys, arachne-pnr and IceStorm provide an fully open-source Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development.

The authors of arachne-pnr have now prepared its successor 'nextpnr'.

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硬體架構 套件大小 安裝後大小 檔案
amd64 213。6 kB655。0 kB [檔案列表]